LKR 55.00
The CD4035B 4-bit parallel-in/parallel-out shift register is a
monolithic complementary MOS (CMOS) integrated circuit
constructed with P- and N-channel enhancement mode
transistors. This shift register is a 4-stage clocked serial register
having provisions for synchronous parallel inputs to
each stage and serial inputs to the first stage via JK logic.
Register stages 2, 3, and 4 are coupled in a serial āāDāā flipflop
configuration when the register is in the serial mode
(parallel/serial control low).