LKR 45.00
The 7491 is a monolithic serial−in, serial−out, 8−bit shift register in a 14−Lead DIP type
package that utilizes transistor−transistor logic (TTL) circuits and is composed of eight R−S
master−slave flip−flops, input gating, and a clock driver. Single−rail data and input control are
gated through inputs A and B and an internal inverter to form the complementary inputs to the
first bit of the shift register. Drive for the internal common clock line is provided by an inverting
clock driver. This clock pulse inverter/driver causes the circuit to shift information one bit on the
positive edge of an input clock pulse.